This invention relates to data processing systems, and particularly to a memory system including means for data correction.
In the construction of a read-only memory (ROM), bits of data are put into locations of a matrix comprising the memory. There are many reasons for memory correction. One reason is that in the fabrication of memory matrices, faulty bits (matrix locations) may be produced. It may also be desired to modify the program embodied in the matrix without removing the entire fixed memory. In order to provide memory correction, an additional memory programmed with corrected data is provided. This memory must be positioned in memory space. In other words, the memory system must decide which of the original data is to be provided from the additional, or overlay, memory and not from the fixed memory. The memory positioning means comprises address decoding circuitry which responds to the address of data and determines whether the data is to be provided from the fixed memory or the overlay memory. In the past, it was necessary to leave positioning means for an overlapping memory undedicated at the time of design of a memory constructed in a printed circuit board. At the time of installation, the address decoding must be designed and implemented to the particular configuration desired. This has involved complex circuitry. In one prior apparatus, a search of memory locations was required and comparison to a standard necessitated in order to determine what bits from the fixed memory were to be replaced by bits from the overlay memory. In simpler configurations, correction capability was extremely limited. In accordance with the present invention, however, the circuitry necessary to locate an overlapping memory in a fixed memory on a printed circuit board is simplified. Therefore, a printed circuit board can be designed without regard to the position in the memory space of the overlapping memory. Positioning means (in the present invention a mapping memory) may be added at the time of assembly or in the field. Versatility of the memory constructed in accordance with the present invention is improved, maintenance and installation costs are reduced, and circuitry is simplified.